282-to-607 TOPS/W, 7T-SRAM based CiM with reconfigurable column SAR ADC for neural network processing Q Zang, WL Goh, L Lu, C Yu, J Mu, TTH Kim, B Kim, D Li, AT Do 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | 5 | 2023 |
1.7 pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing B Wang, MM Wong, D Li, YS Chong, J Zhou, WF Wong, L Peh, A Mani, ... 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | 3 | 2023 |
1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing D Li, MM Wong, YS Chong, J Zhou, M Upadhyay, A Balaji, A Mani, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024 | | 2024 |
LAXOR: A Bit-Accurate BNN Accelerator with Latch-XOR Logic for Local Computing D Li, T Yamasaki, A Mani, AT Do, N Chen, B Wang 2023 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2023 | | 2023 |