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Nachiket Desai
Nachiket Desai
Research Scientist, Intel Labs
Verified email at intel.com
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Cited by
Year
A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14-nm tri-gate CMOS
HK Krishnamurthy, V Vaidya, P Kumar, R Jain, S Weng, ST Kim, ...
IEEE Journal of Solid-State Circuits 53 (1), 8-19, 2017
972017
Adaptive rectifier and method of operation
G Lisi, NV Desai, S Arora, R Subramonian, G Socci, D Du
US Patent 9,831,684, 2017
552017
A digitally controlled fully integrated voltage regulator with 3-D-TSV-based on-die solenoid inductor with a planar magnetic core for 3-D-stacked die applications in 14-nm tri …
HK Krishnamurthy, S Weng, GE Mathew, N Desai, R Saraswat, ...
IEEE journal of solid-state circuits 53 (4), 1038-1048, 2017
382017
A bipolarą40 mV self-starting boost converter with transformer reuse for thermoelectric energy harvesting
NV Desai, Y Ramadass, AP Chandrakasan
Proceedings of the 2014 international symposium on Low power electronics and …, 2014
342014
A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication
N Desai, J Yoo, AP Chandrakasan
Solid-State Circuits, IEEE Journal of 49 (9), 1995-2004, 2014
282014
A fuzzy logic based approach to de-weather fog-degraded images
N Desai, A Chatterjee, S Mishra, D Chudasama, S Choudhary, SK Barai
2009 Sixth International Conference on Computer Graphics, Imaging and …, 2009
282009
8.5 a fully integrated voltage regulator in 14nm CMOS with package-embedded air-core inductor featuring self-trimmed, digitally controlled variable on-time discontinuous …
C Schaef, N Desai, H Krishnamurthy, S Weng, H Do, W Lambert, ...
2019 IEEE international solid-state circuits conference-(ISSCC), 154-156, 2019
252019
A light-load efficient fully integrated voltage regulator in 14-nm CMOS with 2.5-nH package-embedded air-core inductors
C Schaef, N Desai, HK Krishnamurthy, X Liu, KZ Ahmed, S Kim, S Weng, ...
IEEE Journal of Solid-State Circuits 54 (12), 3316-3325, 2019
242019
An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation
N Desai, C Juvekar, S Chandak, AP Chandrakasan
IEEE Journal of Solid-State Circuits 53 (1), 236-246, 2017
242017
Advanced scaling of enhancement mode high-K gallium nitride-on-300mm-Si (111) transistor and 3D layer transfer GaN-silicon finfet CMOS integration
HW Then, M Radosavljevic, P Koirala, N Thomas, N Nair, I Ban, ...
2021 IEEE International Electron Devices Meeting (IEDM), 11.1. 1-11.1. 4, 2021
212021
Beyond crypto: Physical-layer security for Internet of Things devices
RT Yazicigil, PM Nadeau, DD Richman, C Juvekar, S Maji, U Banerjee, ...
IEEE Solid-State Circuits Magazine 12 (4), 66-78, 2020
152020
A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion
U Radhakrishna, P Riehl, N Desai, P Nadeau, Y Yang, A Shin, JH Lang, ...
2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018
152018
Multiple output voltage conversion
V De, K Ravichandran, H Krishnamurthy, K Ahmed, S Vangal, V Vaidya, ...
US Patent 11,411,491, 2022
132022
A 32-a, 5-v-input, 94.2% peak efficiency high-frequency power converter module featuring package-integrated low-voltage gan nmos power transistors
N Desai, HW Then, J Yu, HK Krishnamurthy, WJ Lambert, N Butzen, ...
IEEE Journal of Solid-State Circuits 57 (4), 1090-1099, 2022
132022
Efficiency maximization for device-to-device wireless charging
NV Desai, AP Chandrakasan
US Patent 10,498,160, 2019
132019
Advances in Research on 300mm gallium nitride-on-Si (111) NMOS transistor and silicon CMOS integration
HW Then, M Radosavljevic, N Desai, R Ehlert, V Hadagali, K Jun, ...
2020 IEEE International Electron Devices Meeting (IEDM), 27.3. 1-27.3. 4, 2020
122020
Scaled Submicron Field-Plated Enhancement Mode High-K Gallium Nitride Transistors on 300mm Si (111) Wafer with Power FoM (R ON xQ GG) of 3.1 mohm-nC at 40V and f T/f MAX of 130 …
HW Then, M Radosavljevic, P Koirala, M Beumer, S Bader, A Zubair, ...
2022 International Electron Devices Meeting (IEDM), 35.1. 1-35.1. 4, 2022
112022
A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting
P Garcha, D El-Damak, N Desai, J Troncoso, E Mazotti, J Mullenix, ...
ESSCIRC 2017-43rd IEEE European Solid State Circuits Conference, 127-130, 2017
102017
Physically unclonable function implemented with spin orbit coupling based magnetic memory
V De, K Ravichandran, H Krishnamurthy, K Ahmed, S Vangal, V Vaidya, ...
US Patent 10,897,364, 2021
82021
17.4 peak-current-controlled ganged integrated high-frequency buck voltage regulators in 22nm CMOS for robust cross-tile current sharing
N Desai, HK Krishnamurthy, K Ahmed, S Weng, S Kim, X Liu, HT Do, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 262-264, 2021
72021
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