Dibyendu Das
Dibyendu Das
Verified email at intel.com
Title
Cited by
Cited by
Year
Function inlining versus function cloning
D Das
ACM SIGPLAN Notices 38 (6), 23-29, 2003
182003
A practical and fast iterative algorithm for φ-function computation using DJ graphs
D Das, U Ramakrishna
ACM Transactions on Programming Languages and Systems (TOPLAS) 27 (3), 426-440, 2005
172005
Method and apparatus for providing class hierarchy information for function devirtualization
D Das
US Patent 7,743,368, 2010
142010
Experiences of using a dependence profiler to assist parallelization for multi-cores
D Das, P Wu
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
122010
Compiler-controlled extraction of computation-communication overlap in MPI applications
D Das, M Gupta, R Ravindran, W Shivani, P Sivakeshava, R Uppal
2008 IEEE International Symposium on Parallel and Distributed Processing, 1-8, 2008
102008
OpenMP technical report 1 on directives for attached accelerators
E Stotzer, J Beyer, D Das, G Jost, P Raghavendra, J Leidel, A Duran, ...
The OpenMP Architecture Review Board, Tech. Rep, 2012
72012
Speeding up STL Set/Map Usage in C++ Applications
D Das, M Valluri, M Wong, C Cambly
SPEC International Performance Evaluation Workshop, 314-321, 2008
62008
Compiler driven mechanism for registration and deregistration of memory pages
D Das, M Gupta
US Patent 8,612,953, 2013
52013
High efficiency compilation framework for streamlining the execution of compiled code
M Kandasamy, M Gupta, V Ranganathan, D Das
US Patent 8,250,552, 2012
52012
High efficiency compilation framework for streamlining the execution of compiled code
M Kandasamy, M Gupta, V Ranganathan, D Das
US Patent 8,250,552, 2012
52012
Implementing Cross-Device Atomics in Heterogeneous Processors
M Gupta, D Das, P Raghavendra, T Tye, L Lobachev, A Agarwal, ...
IPDPSW, 659-668, 2015
42015
Process mapping in parallel computing
D Das, N Kathiresan, R Ravindran, B Venkatsubramaniam
US Patent 8,161,127, 2012
42012
A heuristic for the maximum processor requirement for scheduling layered task graphs with cloning
D Das, P Dasgupta, PP Das
Journal of Parallel and Distributed Computing 49 (2), 169-181, 1998
41998
A new method for transparent fault tolerance of distributed programs on a network of workstations using alternative schedules
D Das, P Dasgupta, PP Das
Proceedings of 3rd International Conference on Algorithms and Architectures …, 1997
41997
Scalable partial vectorization
R Ramanarayanan, M Gupta, SS Chakraborty, D Das
US Patent 9,158,511, 2015
32015
Efficient liveness computation using merge sets and DJ-graphs
D Das, B Dupont De Dinechin, R Upadrasta
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-18, 2012
32012
Method and system for mpi_wait sinking for better computation-communication overlap in mpi applications
D Das, M Gupta, R Ravindran, B Venkatsubramaniam
US Patent App. 12/189,258, 2010
32010
Harnessing partial vectorization in Open64 compiler
R Ramanarayanan, M Gupta, SS Chakraborty, D Das, M Lai
2014 IEEE International Advance Computing Conference (IACC), 813-824, 2014
22014
Method for computation-communication overlap in MPI applications
D Das, M Gupta, R Ravindran, B Venkatsubramaniam
US Patent 8,104,029, 2012
22012
Accelerating generic loop iterators using speculative execution
G Bikshandi, D Das, SR Sarangi
US Patent 8,701,099, 2014
12014
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