| Algebric decision diagrams and their applications RI Bahar, EA Frohm, CM Gaona, GD Hachtel, E Macii, A Pardo, ... Formal methods in system design 10 (2), 171-206, 1997 | 1042 | 1997 |
| Power and energy reduction via pipeline balancing RI Bahar, S Manne Proceedings 28th Annual International Symposium on Computer Architecture …, 2001 | 270 | 2001 |
| 3D fully convolutional networks for subcortical segmentation in MRI: A large-scale study J Dolz, C Desrosiers, IB Ayed NeuroImage 170, 456-470, 2018 | 251 | 2018 |
| DRUM: A dynamic range unbiased multiplier for approximate applications S Hashemi, RI Bahar, S Reda 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 418-425, 2015 | 199 | 2015 |
| Power and performance tradeoffs using various caching strategies RI Bahar, G Albera, S Manne Proceedings of the 1998 international symposium on Low power electronics and …, 1998 | 166 | 1998 |
| ABACUS: A technique for automated behavioral synthesis of approximate computing circuits K Nepal, Y Li, RI Bahar, S Reda 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 157 | 2014 |
| A probabilistic-based design methodology for nanoscale computation RI Bahar, J Mundy, J Chen ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003 | 150 | 2003 |
| Ensuring write ordering under writeback cache error conditions RL Stamm, RI Bahar, RL Strouble, ND Wade, JH Edmondson US Patent 5,347,648, 1994 | 134 | 1994 |
| Error transition mode for multi-processor system RL Stamm, RI Bahar, M Callander, L Chao, DR Meyer, D Sanders, ... US Patent 5,155,843, 1992 | 123 | 1992 |
| Designing logic circuits for probabilistic computation in the presence of noise K Nepal, RI Bahar, J Mundy, WR Patterson, A Zaslavsky Proceedings of the 42nd Annual Design Automation Conference, 485-490, 2005 | 107 | 2005 |
| Architectures for silicon nanoelectronics and beyond RI Bahar, D Hammerstrom, J Harlow, WH Joyner, C Lau, D Marculescu, ... Computer 40 (1), 25-33, 2007 | 105 | 2007 |
| Understanding the impact of precision quantization on the accuracy and energy of neural networks S Hashemi, N Anthony, H Tann, RI Bahar, S Reda Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 86 | 2017 |
| Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills RL Stamm, RI Bahar, ND Wade US Patent 5,404,483, 1995 | 81 | 1995 |
| Nano, quantum and molecular computing SK Shukla, RI Bahar Kluwer Academic, 2004 | 78 | 2004 |
| Dynamically reconfiguring processor resources to reduce power consumption in high-performance processors R Maro, Y Bai, RI Bahar International Workshop on Power-Aware Computer Systems, 97-111, 2000 | 77 | 2000 |
| Energy reduction in multiprocessor systems using transactional memory T Moreshet, RI Bahar, M Herlihy Proceedings of the 2005 international symposium on Low power electronics and …, 2005 | 54 | 2005 |
| Parametric yield management for 3D ICs: Models and strategies for improvement C Ferri, S Reda, RI Bahar ACM Journal on Emerging Technologies in Computing Systems (JETC) 4 (4), 1-22, 2008 | 53 | 2008 |
| Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems C Ferri, S Wood, T Moreshet, RI Bahar, M Herlihy Journal of Parallel and Distributed Computing 70 (10), 1042-1052, 2010 | 52 | 2010 |
| Runtime configurable deep neural networks for energy-accuracy trade-off H Tann, S Hashemi, RI Bahar, S Reda 2016 International Conference on Hardware/Software Codesign and System …, 2016 | 51 | 2016 |
| Strategies for improving the parametric yield and profits of 3D ICs C Ferri, S Reda, RI Bahar 2007 IEEE/ACM International Conference on Computer-Aided Design, 220-226, 2007 | 51 | 2007 |
