| Vertical silicon nanowire gate-all-around field effect transistor based nanoscale CMOS S Maheshwaram, SK Manhas, G Kaushal, B Anand, N Singh IEEE electron device letters 32 (8), 1011-1013, 2011 | 47 | 2011 |
| A degradation model of double gate and gate-all-around MOSFETs with interface trapped charges including effects of channel mobile charge carriers R Shankar, G Kaushal, S Maheshwaram, S Dasgupta, SK Manhas IEEE Transactions on Device and Materials Reliability 14 (2), 689-697, 2014 | 34 | 2014 |
| Radiation effects in Si-NW GAA FET and CMOS inverter: A TCAD simulation study G Kaushal, SS Rathod, S Maheshwaram, SK Manhas, AK Saxena, ... IEEE Transactions on Electron Devices 59 (5), 1563-1566, 2012 | 34 | 2012 |
| Virtual mouse control using colored finger tips and hand gesture recognition VVT Reddy, T Dhyanchand, GV Krishna, S Maheshwaram 2020 IEEE-HYDCON, 1-5, 2020 | 31 | 2020 |
| Vertical nanowire CMOS parasitic modeling and its performance analysis S Maheshwaram, SK Manhas, G Kaushal, B Anand, N Singh IEEE transactions on electron devices 60 (9), 2943-2950, 2013 | 30 | 2013 |
| Effect of load capacitance and input transition time on FinFET inverter capacitances A Pandey, S Raycha, S Maheshwaram, SK Manhas, S Dasgupta, ... IEEE Transactions on Electron Devices 61 (1), 30-36, 2013 | 28 | 2013 |
| Reduction of GIDL using dual work-function metal gate in DRAM SK Gautam, S Maheshwaram, SK Manhas, A Kumar, S Sherman, SH Jo 2016 IEEE 8th International Memory Workshop (IMW), 1-4, 2016 | 26 | 2016 |
| Design and simulation of CNT based nano-transistor for greenhouse gas detection CV SaikumarReddy, C Venkataiah, VR Kumar, S Maheshwaram, N Jain, ... Journal of nanoelectronics and optoelectronics 13 (4), 593-601, 2018 | 25 | 2018 |
| Compact NBTI reliability modeling in Si nanowire MOSFETs and effect in circuits O Prakash, S Beniwal, S Maheshwaram, A Bulusu, N Singh, SK Manhas IEEE Transactions on Device and Materials Reliability 17 (2), 404-413, 2017 | 21 | 2017 |
| Impact of series resistance on Si nanowire MOSFET performance G Kaushal, SK Manhas, S Maheshwaram, S Dasgupta Journal of Computational Electronics 12, 306-315, 2013 | 17 | 2013 |
| Device circuit co-design issues in vertical nanowire CMOS platform S Maheshwaram, SK Manhas, G Kaushal, B Anand, N Singh IEEE electron device letters 33 (7), 934-936, 2012 | 17 | 2012 |
| Design and performance optimization of junctionless bottom spacer FinFET for digital/analog/RF applications at sub-5nm technology node S Valasa, KV Ramakrishna, N Vadthiya, S Bhukya, NB Rao, ... ECS Journal of Solid State Science and Technology 12 (1), 013004, 2023 | 11 | 2023 |
| Low power SRAM design for 14 nm GAA Si-nanowire technology G Kaushal, H Jeong, S Maheshwaram, SK Manhas, S Dasgupta, SO Jung Microelectronics Journal 46 (12), 1239-1247, 2015 | 11 | 2015 |
| A novel circular double-gate SOI MOSFET with raised source/drain S Kallepelli, S Maheshwaram Semiconductor Science and Technology 36 (6), 065009, 2021 | 10 | 2021 |
| Compact model for vertical silicon nanowire based device simulation and circuit design M Sharma, S Maheshwaram, O Prakash, A Bulusu, AK Saxena, ... 2015 International SoC Design Conference (ISOCC), 107-108, 2015 | 10 | 2015 |
| Novel Design Methodology Using Sizing in Nanowire CMOS Logic G Kaushal, SK Manhas, S Maheshwaram, B Anand, S Dasgupta, N Singh IEEE Transactions on Nanotechnology 13 (4), 650-658, 2014 | 10 | 2014 |
| Performance and variability analysis of SiNW 6T-SRAM cell using compact model with parasitics O Prakash, S Maheshwaram, M Sharma, A Bulusu, SK Manhas IEEE Transactions on Nanotechnology 16 (6), 965-973, 2017 | 9 | 2017 |
| A novel circular double gate with raised source/drain SOI MOSFET S Kallepelli, S Maheshwaram Semicond. Sci. Technol. 36 (6), 65009, 2021 | 6 | 2021 |
| Impact of time zero variability and BTI reliability on SiNW FET-based circuits O Prakash, S Maheshwaram, S Beniwal, N Gupta, N Singh, SK Manhas IEEE Transactions on Device and Materials Reliability 19 (4), 741-750, 2019 | 5 | 2019 |
| Performance Analysis of Sub 10 nm Double Gate Circular MOSFET K Sagar, S Maheshwaram Silicon 14 (15), 9431-9439, 2022 | 4 | 2022 |
Bulusu AnandIndian Institute of Technology RoorkeeVerified email at ece.iitr.ac.in
