| FPGA Implementation of Protected Compact AES S–Box Using CQCG for Embedded Applications R Sornalatha, N Janakiraman, K Balamurugan, AK Sivaraman, R Vincent, ... Smart Intell. Comput. Commun. Technol. 38, 396-401, 2021 | 19 | 2021 |
| Modeling of widely linear digitally controlled self-interference canceller for full-duplex transceiver R Sornalatha, N Janakiraman, T Balasharmitha 2017 International Conference on Wireless Communications, Signal Processing …, 2017 | 3 | 2017 |
| Multiuser Visible Light Communication System For Reliable Wireless Communication R Sornalatha, N Janakiraman 2017 IEEE International Conference on Computational Intelligence and …, 2017 | 1 | 2017 |
| Design and Implementation of RNS Reverse Converter using Parallel Prefix Adders MK Rajalingam, A Muthumanicckam, R Sornalatha International Journal of Computer Applications 117 (6), 2015 | 1 | 2015 |
| A novel energy methodical digital self-interference cancellation technique for 5G applications R Sornalatha, N Janakiraman, T Balasharmitha Advances in Natural and Applied Sciences 11 (7), 7-15, 2017 | | 2017 |
| Low Power and High Performance SRAM-based Architecture for TCAM PG Gopinath, A Anand, R Sornalatha Indian Journal of Research in Applied Sciences Engineering (IJRASE) 3 (1), 1-4, 2015 | | 2015 |
| LOW POWER CACHE MEMORY ARCHITECTURE USING BANDWIDTH SCALABLE CONTROLLER N MALLIKA, A MUTHUMANICCKAM, R SORNALATHA Asian Journal of Science and Applied Technology (AJSAT) 3 (1), 24-28, 2015 | | 2015 |
| Low Power Cache Memory Architecture Using Bandwidth Scalable Controller A Muthumanicckam, R Sornalatha, L Vijayprabakaran | | |
Janakiraman NithiyananthamK.L.N. College of EngineeringVerified email at klnce.edu
