| Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET N Loubet, T Hook, P Montanini, CW Yeung, S Kanakasabapathy, ... 2017 symposium on VLSI technology, T230-T231, 2017 | 771 | 2017 |
| Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications J Zhang, J Frougier, A Greene, X Miao, L Yu, R Vega, P Montanini, ... 2019 IEEE International Electron Devices Meeting (IEDM), 11.6. 1-11.6. 4, 2019 | 64 | 2019 |
| Machine learning and hybrid metrology using scatterometry and LE-XRF to detect voids in copper lines D Kong, K Motoyama, H Huang, B Mendoza, M Breton, GR Muthinti, ... Metrology, Inspection, and Process Control for Microlithography XXXIII 10959 …, 2019 | 12 | 2019 |
| Measuring local CD uniformity in EUV vias with scatterometry and machine learning D Kong, D Schmidt, J Church, CC Liu, M Breton, C Murray, E Miller, L Meli, ... Metrology, Inspection, and Process Control for Microlithography XXXIV 11325 …, 2020 | 11 | 2020 |
| Integration scheme for non-volatile memory on gate-all-around structure D Kong, Z Bi, Z Xu, K Cheng US Patent 10,615,288, 2020 | 9 | 2020 |
| In-line characterization of non-selective SiGe nodule defects with scatterometry enabled by machine learning D Kong, R Chao, M Breton, C Liu, GR Muthinti, S Seo, NJ Loubet, ... Metrology, Inspection, and Process Control for Microlithography XXXII 10585 …, 2018 | 9 | 2018 |
| Tuning Ag/Si (100) island size, shape, and density D Kong, J Drucker Journal of Applied Physics 114 (14), 2013 | 8 | 2013 |
| Resistive memory process optimization for high resistance switching toward scalable analog compute technology for deep learning Y Kim, SC Seo, S Consiglio, P Jamison, H Higuchi, M Rasch, EY Wu, ... IEEE Electron Device Letters 42 (5), 759-762, 2021 | 7 | 2021 |
| Quantum-state transfer on spin-chain channels with random imperfections DX Kong, AM Wang The European Physical Journal D 55, 211-221, 2009 | 5 | 2009 |
| Forming FinFET with reduced variability K Cheng, J Li, Z Bi, D Kong US Patent 10,886,367, 2021 | 4 | 2021 |
| Development of SiGe indentation process control to enable stacked Nanosheet FET technology D Kong, D Schmidt, M Breton, J Frougier, A Greene, J Zhang, V Basker, ... 2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC …, 2020 | 4 | 2020 |
| Producing strained nanosheet field effect transistors using a phase change material D Kong, K Cheng, J Li, Z Bi US Patent 10,714,569, 2020 | 4 | 2020 |
| Semiconductor memory device having a vertical active region J Li, K Cheng, T Ando, D Kong US Patent 10,686,014, 2020 | 4 | 2020 |
| RRAM cells in crossbar array architecture D Kong, T Ando, K Cheng, J Li US Patent 10,559,625, 2020 | 4 | 2020 |
| Field effect transistor devices with self-aligned source/drain contacts and gate contacts positioned over active transistors K Cheng, J Li, Z Bi, D Kong US Patent 11,195,755, 2021 | 3 | 2021 |
| Process-Induced ReRAM Performance Improvement of Atomic Layer Deposited HfO2 for Analog In-Memory Computing Applications S Consiglio, H Higuchi, T Ando, P Jamison, SC Seo, D Kong, Y Kim, ... ECS Transactions 102 (2), 19, 2021 | 3 | 2021 |
| Controlling filament formation and location in a resistive random-access memory device D Kong, J Li, T Ando, K Cheng US Patent 10,903,421, 2021 | 3 | 2021 |
| Gate-all-around transistor based non-volatile memory devices Z Xu, Z Bi, D Kong, Q Chen US Patent 10,586,875, 2020 | 3 | 2020 |
| Novel hybrid metrology for process integration of gate all around (GAA) devices (Conference Presentation) GR Muthinti, N Loubet, R Chao, AA De La Pena, D Kong, J Li, B Mendoza, ... Metrology, Inspection, and Process Control for Microlithography XXXII 10585 …, 2018 | 3 | 2018 |
| Interpreting plasmonic response of epitaxial Ag/Si(100) island ensembles D Kong, L Jiang, J Drucker Journal of Applied Physics 118 (21), 213103, 2015 | 3 | 2015 |
Mary BretonTestsite Layout & Design Manager, IBMVerified email at us.ibm.com
