Duane Boning
Title
Cited by
Cited by
Year
Handbook of semiconductor manufacturing technology
Y Nishi, R Doering
CRC press, 2000
8772000
Towards Fast Computation of Certified Robustness for ReLU Networks
TW Weng, H Zhang, H Chen, Z Song, CJ Hsieh, D Boning, IS Dhillong, ...
International Conference on Machine Learning (ICML) PMLR 80, 5276-5285, 2018
3142018
Run-to-run control in semiconductor manufacturing
J Moyne, E Del Castillo, AM Hurwitz
CRC press, 2018
3042018
Design for manufacturability and statistical design: a constructive approach
M Orshansky, S Nassif, D Boning
Springer Science & Business Media, 2007
2762007
Analysis and decomposition of spatial variation in integrated circuit processes and devices
BE Stine, DS Boning, JE Chung
IEEE Transactions on Semiconductor Manufacturing 10 (1), 24-41, 1997
2741997
The physical and electrical effects of metal-fill patterning practices for oxide chemical-mechanical polishing processes
BE Stine, DS Boning, JE Chung, L Camilletti, F Kruppa, ER Equi, W Loh, ...
IEEE Transactions on Electron Devices 45 (3), 665-679, 1998
2501998
Models of process variations in device and interconnect
DS Boning, S Nassif
Design of High Performance Microprocessor Circuits, 98-115, 2000
2412000
Run by run control of chemical-mechanical polishing
DS Boning, WP Moyne, TH Smith, J Moyne, R Telfeyan, A Hurwitz, ...
IEEE Transactions on Components, Packaging, and Manufacturing Technology …, 1996
2081996
Handbook of silicon semiconductor metrology
AC Diebold
CRC Press, 2001
1912001
Rapid characterization and modeling of pattern-dependent variation in chemical-mechanical polishing
BE Stine, DO Ouma, RR Divecha, DS Boning, JE Chung, DL Hetherington, ...
Semiconductor Manufacturing, IEEE Transactions on 11 (1), 129-140, 1998
1631998
Characterization and Modeling of Oxide Chemical-Mechanical Polishing Using Planarization Length and Pattern Density Concepts
DO Ouma, DS Boning, JE Chung, WG Easter, V Saxena, S Misra, ...
IEEE Transactions on Semiconductor Manufacturing 15 (2), 232-244, 2002
1592002
A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance
V Mehrotra, SL Sam, D Boning, A Chandrakasan, R Vallishayee, S Nassif
Proceedings of the 37th Annual Design Automation Conference, 172-175, 2000
1572000
A closed-form analytic model for ILD thickness variation in CMP processes
B Stine, D Ouma, R Divecha, D Boning, J Chung, DL Hetherington, I Ali, ...
Chemical-Mechanical Planarization for ULSI Multilevel Interconnect Confer …, 1997
1371997
A self-tuning EWMA controller utilizing artificial neural network function approximation techniques
TH Smith, DS Boning
IEEE Transactions on Components, Packaging, and Manufacturing Technology …, 1997
1291997
A Self-Tuning EWMA Controller Utilizing Artificial Neural Network Function Approximation Techniques
T Smith, D Boning
Advanced Semiconductor Manufacturing Conference and Workshop, 1996. ASMC 96 …, 1996
1291996
DOE/Opt: A system for design of experiments, response surface modeling, and optimization using process and device simulation
DS Boning, PK Mozumder
IEEE Transactions on Semiconductor Manufacturing 7 (2), 233-244, 1994
1201994
Modeling the effects of manufacturing variation on high-speed microprocessor interconnect performance
V Mehrotra, S Nassif, D Boning, J Chung
International Electron Devices Meeting 1998. Technical Digest (Cat. No …, 1998
1111998
An integrated characterization and modeling methodology for CMP dielectric planarization
D Ouma, D Boning, J Chung, G Shin, L Olsen, J Clark
Proceedings of the IEEE 1998 International Interconnect Technology …, 1998
1091998
Technology scaling impact of variation on clock skew and interconnect delay
V Mehrotra, D Boning
Proceedings of the IEEE 2001 International Interconnect Technology …, 2001
912001
Run by Run Advanced Process Control of Metal Sputter Deposition
T Smith, D Boning, J Stefani, SW Butler
Proc. of the Second International Symposium on Process Control, Diagnostics …, 1997
811997
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