| Impact of Oxide Thickness on Gate Capacitance-- A Comprehensive Analysis on MOSFET, Nanowire FET and CNTFET Devices S Sinha, S Chaudhury IEEE Transactions on Nanotechnology 12 (6), 958-964, 2013 | 88 | 2013 |
| Temperature analysis of Ge/Si heterojunction SOI-tunnel FET S Chander, SK Sinha, S Kumar, PK Singh, K Baral, K Singh, S Jit Superlattices and Microstructures 110, 162-170, 2017 | 57 | 2017 |
| Comparative study of leakage power in CNTFET over MOSFET device SK Sinha, S Chaudhury Journal of Semiconductors 35 (11), 114002, 2014 | 48 | 2014 |
| Analysis of different parameters of channel material and temperature on threshold voltage of CNTFET SK Sinha, S Chaudhury Materials Science in Semiconductor Processing 31, 431-438, 2015 | 39 | 2015 |
| Two-dimensional analytical modeling for electrical characteristics of Ge/Si SOI-tunnel FinFETs S Chander, S Baishya, SK Sinha, S Kumar, PK Singh, K Baral, ... Superlattices and Microstructures 131, 30-39, 2019 | 38 | 2019 |
| Advantage of CNTFET characteristics over MOSFET to reduce leakage power SK Sinha, S Chaudhury 2014 2nd international conference on devices, circuits and systems (ICDCS), 1-5, 2014 | 38 | 2014 |
| Comprehensive review on electrical noise analysis of TFET structures S Chander, SK Sinha, R Chaudhary Superlattices and Microstructures 161, 107101, 2022 | 30 | 2022 |
| Improvement of electrical characteristics of SiGe source based tunnel FET device IA Pindoo, SK Sinha, S Chander Silicon 13 (9), 3209-3215, 2021 | 28 | 2021 |
| CNTFET based Logic Circuits: A Brief Review SK Sinha, S Choudhury lJETAE, page (s), 500-504, 2012 | 27 | 2012 |
| CNTFET: The emerging post-CMOS device SK Sinha, K Kumar, S Chaudhury 2013 international conference on signal processing and Communication (ICSC …, 2013 | 25 | 2013 |
| Impact of temperature variation on CNTFET device characteristics SK Sinha, S Chaudhury Control, Automation, Robotics and Embedded Systems (CARE), 2013 …, 2013 | 24 | 2013 |
| Performance analysis of heterojunction tunnel FET device with variable temperature IA Pindoo, SK Sinha, S Chander Applied Physics A 127, 1-10, 2021 | 23 | 2021 |
| Low-Power Efficient p+ Si 0.7 Ge 0.3 Pocket Junctionless SGTFET with Varying Operating Conditions SL Tripathi, SK Sinha, GS Patel Journal of Electronic Materials, 1-9, 2020 | 23 | 2020 |
| Ge-source based L-shaped tunnel field effect transistor for low power switching application S Chander, SK Sinha, R Chaudhary, A Singh Silicon, 1-14, 2021 | 21 | 2021 |
| Investigation of DC performance of Ge-source pocket silicon-on-insulator tunnel field effect transistor in nano regime SK Sinha, S Chander International Journal of Nanoparticles 13 (1), 13-20, 2021 | 21 | 2021 |
| Effect of temperature and chiral vector on emerging CNTFET device SK Sinha, P Singh, S Chaudhury 2014 International Conference on Computing for Sustainable Global …, 2014 | 19 | 2014 |
| Carbon nanotube and nanowires for future semiconductor devices applications S Chaudhury, SK Sinha Nanoelectronics, 375-398, 2019 | 17 | 2019 |
| Si/Ge/GaAs as channel material in Nanowire-FET structures for future semiconductor devices SK Sinha, K Kumar, S Chaudhury 2015 IEEE international conference on electron devices and solid-state …, 2015 | 16 | 2015 |
| Simulation and analysis of quantum capacitance in single-gate MOSFET, double-gate MOSFET and CNTFET devices for nanometre regime SK Sinha, S Chaudhury Communications, Devices and Intelligent Systems (CODIS), 2012 International …, 2012 | 15 | 2012 |
| Oxide thickness effect on quantum capacitance in single-gate MOSFET and CNTFET devices SK Sinha, S Chaudhury India Conference (INDICON), 2012 Annual IEEE, 042-046, 2012 | 13 | 2012 |
