Praveen Samudrala
Praveen Samudrala
Unknown affiliation
Verified email at google.com
Title
Cited by
Cited by
Year
Selective triple modular redundancy (STMR) based single-event upset (SEU) tolerant synthesis for FPGAs
PK Samudrala, J Ramos, S Katkoori
IEEE transactions on Nuclear Science 51 (5), 2957-2969, 2004
2342004
Notice of Violation of IEEE Publication Principles: Selective Triple Modular Redundancy for Single Event Upset (SEU) Mitigation
X She, PK Samudrala
2009 NASA/ESA Conference on Adaptive Hardware and Systems, 344-350, 2009
432009
Selective triple modular redundancy for SEU mitigation in FPGAs
PK Samudrala, J Ramos, S Katkoori
Proceedings of Military and Aerospace Applications of Programmable Logic and …, 2003
222003
SEU mitigation for reconfigurable FPGAs
DR Czajkowski, PK Samudrala, MP Pagey
2006 IEEE Aerospace Conference, 7 pp., 2006
182006
Method and apparatus for creating circuit redundancy in programmable logic devices
PK Samudrala, S Katkoori, J Ramos
US Patent 6,963,217, 2005
142005
Low power, high-speed radiation hardened computer & flight experiment
DR Czajkowski, MP Pagey, PK Samudrala, M Goksel, MJ Viehman
2005 IEEE Aerospace Conference, 1-10, 2005
122005
SEFI mitigation technique for COTS microprocessors: Demonstration using proton irradiation experiments
MP Pagey, DR Czajkowski, PK Samudrala, DJ Strobel
2004 Military Aerospace Programmable Logic Devices Conference (MAPLD), 2004
62004
Low Power High-Speed Radiation Tolerant Computer
D Czajkowski, P Samudrala, M Pagey, D Strobel
22005
PART IV OF FOUR PARTS
S Antinori, D Falchieri, A Gabrielli, E Gandolfi, A Ordine, A Boiano, ...
The system can't perform the operation now. Try again later.
Articles 1–9