| A Review of the Gate-All-Around Nanosheet FET Process Opportunities S Mukesh, J Zhang Electronics 11 (21), 3589, 2022 | 30 | 2022 |
| Critical elements for next generation high performance computing nanosheet technology R Bao, C Durfee, J Zhang, L Qin, J Rozen, H Zhou, J Li, S Mukesh, ... 2021 IEEE International Electron Devices Meeting (IEDM), 26.3. 1-26.3. 4, 2021 | 12 | 2021 |
| Modeling intracochlear magnetic stimulation: a Finite-Element Analysis S Mukesh, DT Blake, BJ McKinnon, PT Bhatti IEEE Transactions on Neural Systems and Rehabilitation Engineering 25 (8 …, 2016 | 9 | 2016 |
| Qiskit Metal: An Open-Source Framework for Quantum Device Design & Analysis ZK Minev, TG McConkey, J Drysdale, P Shah, D Wang, M Facchini, ... 10.5281/zenodo.4618154, 2021 | 8 | 2021 |
| Magnetic stimulation of dissociated cortical neurons on a planar mulitelectrode array S Mukesh, R Zeller-Townson, RJ Butera, PT Bhatti 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 758-761, 2019 | 4 | 2019 |
| A multiscale simulation study of the structural integrity of damascene interconnects in advanced technology nodes S Mukesh, NA Lanzillo IEEE Transactions on Electron Devices 70 (4), 1977-1982, 2023 | 3 | 2023 |
| Selective patterning of vias with hardmasks JC Arnold, A Dutta, D Metzler, TM Philip, S Mukesh US Patent 11,276,607, 2022 | 2 | 2022 |
| Finite Element Analysis and Experimental Evaluation of Magnetic Stimulation of Neurons Using Microscale Coils Toward an Improved Cochlear Implant S Mukesh Georgia Institute of Technology, PhD Dissertation, 2018 | 2 | 2018 |
| Co-integrated logic, electrostatic discharge, and well contact devices on a substrate J Frougier, S Mukesh, AI Chou, AM Greene, R Xie, VS Basker, J Wang, ... US Patent 11,894,361, 2024 | 1 | 2024 |
| Conformal dielectric cap for subtractive vias S Mukesh, NA Lanzillo, R Robison, R Bao, A Rahman US Patent App. 17/563,607, 2023 | 1 | 2023 |
| Backside power rails and power distribution network for density scaling R Xie, K Choi, S Ghosh, S Mukesh, A Chu, AM Young, ... US Patent App. 17/562,331, 2023 | 1 | 2023 |
| Multilayer dielectric stack for damascene top-via integration S Mukesh, DS Grant, FL Lie, SK Matham, H Shobha, G Karve US Patent App. 17/445,698, 2023 | 1 | 2023 |
| Topological qubit device SJ Holmes, TM Philip, S Mukesh, Y Kim, DK Sadana, R Robison US Patent 11,380,836, 2022 | 1 | 2022 |
| Metal-induced line width variability challenge and mitigation strategy in advanced post-Cu interconnects K Motoyama, N Lanzillo, S Mukesh, B Peethala, T Spooner, D Edelstein, ... 2022 IEEE International Interconnect Technology Conference (IITC), 55-57, 2022 | 1 | 2022 |
| Structural stability of tight-pitched damascene interconnects S Mukesh, NA Lanzillo, K Motayama, T Spooner 2020 IEEE International Interconnect Technology Conference (IITC), 160-162, 2020 | 1 | 2020 |
| System and Method for Intracochlear and Vestibular Magnetic Stimulation S Mukesh, P Bhatti, D Blake, B McKinnon US Patent App. 15/854,873, 2018 | 1 | 2018 |
| Stream alterations under limited bandwidth conditions JS Werner, AO Tsfasman, S Mukesh US Patent 11,956,296, 2024 | | 2024 |
| Neural lattice device for characterization of neuron behavior S Mukesh, S Holmes, JS Werner, BH Wunsch, AO Tsfasman US Patent App. 17/933,509, 2024 | | 2024 |
| Transistors with via-to-backside power rail spacers T Li, QIN Liqiao, DS Grant, N Jain, PR Chowdhury, S Mukesh, K Choi, ... US Patent App. 17/950,361, 2024 | | 2024 |
| Via resistance to backside power rail T Li, S Mukesh, QIN Liqiao, PR Chowdhury, K Choi, R Xie US Patent App. 17/946,740, 2024 | | 2024 |
Pamela BhattiProfessor of Electrical and Computer EngineeringVerified email at ece.gatech.edu
