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Mohit Upadhyay
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Multi-application based network-on-chip design for mesh-of-tree topology using global mapping and reconfigurable architecture
M Upadhyay, M Shah, PV Bhanu, J Soumya, LR Cenkeramaddi
2019 32nd international conference on VLSI Design and 2019 18th …, 2019
172019
Blockchain machine: A network-attached hardware accelerator for hyperledger fabric
H Javaid, J Yang, N Santoso, M Upadhyay, S Mohan, C Hu, G Brebner
2022 IEEE 42nd International Conference on Distributed Computing Systems …, 2022
162022
A novel fault-tolerant routing algorithm for mesh-of-tree based network-on-chips
M Shah, M Upadhyay, PV Bhanu, J Soumya, LR Cenkeramaddi
VLSI Design and Test: 22nd International Symposium, VDAT 2018, Madurai …, 2019
32019
Fault tolerant routing methodology for mesh-of-tree based network-on-chips using local reconfiguration
M Upadhyay, M Shah, PV Bhanu, J Soumya, LR Cenkeramaddi
2018 International Conference on High Performance Computing & Simulation …, 2018
32018
Network-on-Chip-Centric Accelerator Architectures for Edge AI Computing
B Wang, K Dong, NAB Zakaria, M Upadhyay, WF Wong, LS Peh
2022 19th International SoC Design Conference (ISOCC), 243-244, 2022
22022
1.7 pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing
B Wang, MM Wong, D Li, YS Chong, J Zhou, WF Wong, L Peh, A Mani, ...
2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023
12023
REACT: A Heterogeneous Reconfigurable Neural Network Accelerator with Software-Configurable NoCs for Training and Inference on Wearables
M Upadhyay, R Juneja, B Wang, J Zhou, WF Wong, LS Peh
59th ACM/IEEE Design Automation Conference, 1291–1296, 2022
12022
A novel fault-tolerant routing technique for mesh-of-tree based network-on-chip design
M Upadhyay, M Shah, PV Bhanu, J Soumya, LR Cenkarmaddi, H Idsøe
TENCON 2018-2018 IEEE Region 10 Conference, 2378-2383, 2018
12018
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