| Analytical modeling of threshold voltage for symmetrical silicon nano-tube field-effect-transistors (Si-NT FETs) PK Tiwari, VR Samoju, T Sunkara, S Dubey, S Jit Journal of Computational Electronics 15, 516-524, 2016 | 26 | 2016 |
| Quasi-3D subthreshold current and subthreshold swing models of dual-metal quadruple-gate (DMQG) MOSFETs VR Samoju, S Dubey, PK Tiwari Journal of Computational Electronics 14, 582-592, 2015 | 10 | 2015 |
| Investigation of temperature and source/drain overlap impact on negative capacitance silicon nanotube FET (NC Si NTFET) with sub-60mV/decade switching S Moparthi, PK Tiwari, VR Samoju, GK Saramekala IEEE Transactions on Nanotechnology 19, 800-806, 2020 | 9 | 2020 |
| Hardware‐efficient approximate logarithmic division with improved accuracy C Subhasri, BR Jammu, L Guna Sekhar Sai Harsha, N Bodasingi, ... International Journal of Circuit Theory and Applications 49 (1), 128-141, 2021 | 8 | 2021 |
| Analytical modeling of subthreshold characteristics by considering quantum confinement effects in ultrathin dual-metal quadruple gate (DMQG) MOSFETs VR Samoju, K Mahapatra, PK Tiwari Superlattices and Microstructures 111, 704-713, 2017 | 8 | 2017 |
| A quasi-3D threshold voltage model for dual-metal quadruple-gate MOSFETs VR Samoju, S Jit, PK Tiwari Chinese Physics Letters 31 (12), 128502, 2014 | 7 | 2014 |
| Threshold voltage modeling for dual‐metal quadruple‐gate (DMQG) MOSFETs VR Samoju, PK Tiwari International Journal of Numerical Modelling: Electronic Networks, Devices …, 2016 | 4 | 2016 |
| Analytical Modeling of Threshold Voltage for Dual-Metal Double-Gate Gate-All-Around (DM-DG-GAA) MOSFET R Ganapati, VR Samoju, BR Jammu Silicon 13, 2869-2880, 2021 | 3 | 2021 |
| Investigation of the Electrical Properties of Double-Gate Dual-Active-Layer (DG-DAL) Thin-Film Transistor (TFT) with HfO2|La2O3|HfO2 (HLH) Sandwich Gate … L Ramesh, S Moparthi, PK Tiwari, VR Samoju, GK Saramekala Semiconductors 54, 1290-1295, 2020 | 3 | 2020 |
| Temperature dependence of subthreshold characteristics of negative capacitance recessed-source/drain (NC RS/D) SOI MOSFET S Moparthi, PK Tiwari, VR Samoju, GK Saramekala 2019 IEEE International Symposium on Smart Electronic Systems (iSES …, 2019 | 3 | 2019 |
| Analytical Modeling and Simulation of Subthreshold Characteristics of Recessed-Source/Drain (Re-S/D) Silicon-on-Insulator MOSFETs with Gaussian Doping Profile VR Samoju, S Mohapatra, S Bhushan, PK Tiwari Journal of Nanoelectronics and Optoelectronics 12 (5), 490-498, 2017 | 1 | 2017 |
| A low‐error, memory‐based fast binary antilogarithmic converter L Guna Sekhar Sai Harsha, BR Jammu, VR Samoju, S Veeramachaneni, ... International Journal of Circuit Theory and Applications 49 (7), 2214-2226, 2021 | | 2021 |
| Modeling of Drain current and analog characteristics of dual-metal quadruple gate (DMQG) MOSFETs VR Samoju, GK Saramekala, PK Tiwari, AK Swain, K Mahapatra 2019 IEEE International Symposium on Smart Electronic Systems (iSES …, 2019 | | 2019 |
| A Quasi-3D Subthreshold Swing Model of Quadruple-Gate (QG) MOSFETs PK Tiwari, VR Samoju, T Gaurav Journal of Nanoengineering and Nanomanufacturing 5 (4), 255-260, 2015 | | 2015 |
| Modeling and Simulation of Dual Metal Quadruple Gate DMQG MOSFETs VR Samoju Rourkela, 0 | | |
Pramod Kumar TiwariIndian Institute of Technology PatnaVerified email at iitp.ac.in
