Noor Mahammad
Noor Mahammad
Assistant Professor, Computer Science and Engineering, Indian Institute of Information Technology
Verified email at iiitdm.ac.in - Homepage
TitleCited byYear
Constructing online testable circuits using reversible logic
SN Mahammad, K Veezhinathan
IEEE transactions on instrumentation and measurement 59 (1), 101-109, 2009
1522009
Efficient building blocks for reversible sequential circuit design
SKS Hari, S Shroff, SN Mahammad, V Kamakoti
2006 49th IEEE International Midwest Symposium on Circuits and Systems 1 …, 2006
722006
Reduced triple modular redundancy for tolerating seus in sram-based fpgas
VMN Mohammad, V Chandrasekhar, V Kamakoti
Appeared in the Proceedings of NASA International Conference on Military …, 2005
122005
An efficient hardware-based higher radix floating point MAC design
MA Basiri M, NM Sk
ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (1), 15, 2014
92014
Minimization of flow table for TCAM based openflow switches by virtual compression approach
S Veeramani, M Kumar, SN Mahammad
2013 IEEE International Conference on Advanced Networks and …, 2013
92013
A novel adiabatic SRAM cell implementation using split level charge recovery logic
SD Kumar, SKN Mahammad
2015 19th International Symposium on VLSI Design and Test, 1-2, 2015
72015
An efficient hardware based MAC design in digital filters with complex numbers
MMA Basiri, NM Sk
2014 International Conference on Signal Processing and Integrated Networks …, 2014
72014
High speed multiplexer design using tree based decomposition algorithm
NM Sk
Microelectronics Journal 51, 99-111, 2016
52016
Configurable folded IIR filter design
NM Sk
IEEE Transactions on Circuits and Systems II: Express Briefs 62 (12), 1144-1148, 2015
52015
Multiplication acceleration through quarter precision Wallace tree multiplier
MMA Basiri, SC Nayak, NM Sk
2014 International Conference on Signal Processing and Integrated Networks …, 2014
52014
Reduced triple modular redundancy for tolerating SEUs in SRAM-based FPGAs
K Veezhinathan, SN Mahammad, V Muralidaran, V Narayanan, ...
Proceedings of the MAPLD Conference, 2005
52005
Reduced triple modular redundancy for tolerating SEUs in SRAM-based FPGAs
N Vijaykrishnan, V Chandrasekhar, SN Mahammad, V Muralidaran, ...
Pennsylvania State University2005, 2005
52005
An efficient virtualization server infrastructure for e-schools of India
GS Hemanth, SN Mahammad
Information Systems Design and Intelligent Applications, 89-99, 2016
42016
Hardware based genetic evolution of self-adaptive arbitrary response FIR filters
S Mohammed, SKN Mahammad, V Kamakoti
Applied Soft Computing 11 (1), 842-854, 2011
42011
An efficient vlsi architecture for convolution based dwt using mac
NM Sk
2018 31st International Conference on VLSI Design and 2018 17th …, 2018
32018
High performance integer DCT architectures for HEVC
NM Sk
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
32017
An efficient VLSI architecture for lifting based 1D/2D discrete wavelet transform
NM Sk
Microprocessors and Microsystems 47, 404-418, 2016
32016
Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform
NM Sk
Integration 55, 43-56, 2016
32016
Mohamed Asan Basiri M, and Noor Mahammad Sk, High Precision and High Speed handheld Scientific Calculator Design using hardware based CORDIC Algorithm
M Shanmuga Kumar
International Conference On DESIGN AND MANUFACTURING, IConDM 8, 2013
32013
High precision and high speed handheld scientific calculator design using hardware based CORDIC algorithm
S Kumar, NM Sk
Procedia Engineering 64, 56-64, 2013
32013
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