| Slumber: static-power management for gpgpu register files D Tripathy, H Zamani, D Sahoo, LN Bhuyan, M Satpathy Proceedings of the ACM/IEEE International Symposium on Low Power Electronics …, 2020 | 14 | 2020 |
| Fuzzy fairness controller for NVMe SSDs S Tripathy, D Sahoo, M Satpathy, M Mutyam Proceedings of the 34th ACM International Conference on Supercomputing, 1-12, 2020 | 14 | 2020 |
| Formal modeling and verification of controllers for a family of DRAM caches D Sahoo, S Sha, M Satpathy, M Mutyam, S Ramesh, P Roop IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 6 | 2018 |
| MSimDRAM: Formal model driven development of a DRAM simulator D Sahoo, M Satpathy 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 6 | 2016 |
| Formal modeling and verification of nand flash memory supporting advanced operations S Tripathy, D Sahoo, M Satpathy, S Pinisetty 2019 IEEE 37th International Conference on Computer Design (ICCD), 313-316, 2019 | 5 | 2019 |
| CAMO: A novel cache management organization for GPGPUs D Sahoo, S Sha, M Satpathy, M Mutyam, LN Bhuyan 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 215-220, 2018 | 3 | 2018 |
| Multidimensional grid aware address prediction for GPGPU S Tripathy, D Sahoo, M Satpathy 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 2 | 2019 |
| Formal Modeling and Verification of Security Properties of a Ransomware-Resistant SSD S Tripathy, D Sahoo, M Satpathy, M Mutyam IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022 | 1 | 2022 |
| Formal Modeling and Verification of a Victim DRAM Cache D Sahoo, S Sha, M Satpathy, M Mutyam, S Ramesh, P Roop ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (2 …, 2019 | 1 | 2019 |
| ReDRAM: A reconfigurable DRAM cache for GPGPUs D Sahoo, S Sha, M Satpathy, M Mutyam IEEE Computer Architecture Letters 17 (2), 213-216, 2018 | 1 | 2018 |
| An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors D Sahoo, M Satpathy, M Mutyam 2017 30th International Conference on VLSI Design and 2017 16th …, 2017 | 1 | 2017 |
| Post-Model Validation of Victim DRAM Caches D Sahoo, S Tripathy, M Satpathy, M Mutyam 2019 IEEE 37th International Conference on Computer Design (ICCD), 305-308, 2019 | | 2019 |
| Work-in-Progress: DRAM Cache Access Optimization leveraging Line Locking in Tag Cache S Tripathy, D Sahoo, M Satpathy 2018 International Conference on Compilers, Architectures and Synthesis for …, 2018 | | 2018 |
