David Dill
David Dill
Professor, Emeritus, of Computer Science, Stanford University
Verified email at stanford.edu
Title
Cited by
Cited by
Year
A theory of timed automata
R Alur, DL Dill
Theoretical computer science 126 (2), 183-235, 1994
88711994
Symbolic model checking: 1020 states and beyond
JR Burch, EM Clarke, KL McMillan, DL Dill, LJ Hwang
Information and computation 98 (2), 142-170, 1992
42031992
Automata for modeling real-time systems
R Alur, D Dill
International Colloquium on Automata, Languages, and Programming, 322-335, 1990
15131990
EXE: automatically generating inputs of death
C Cadar, V Ganesh, PM Pawlowski, DL Dill, DR Engler
ACM Transactions on Information and System Security (TISSEC) 12 (2), 1-38, 2008
13482008
Model-checking for real-time systems
R Alur, C Courcoubetis, D Dill
[1990] Proceedings. Fifth Annual IEEE Symposium on Logic in Computer Science …, 1990
13071990
Model-checking in dense real-time
R Alur, C Courcoubetis, D Dill
Information and computation 104 (1), 2-34, 1993
12741993
Timing assumptions and verification of finite-state concurrent systems
DL Dill
International Conference on Computer Aided Verification, 197-212, 1989
10131989
Symbolic model checking for sequential circuit verification
JR Burch, EM Clarke, DE Long, KL McMillan, DL Dill
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994
8011994
Trace theory for automatic hierarchical verification of speed-independent circuits
DL Dill
MIT press, 1989
7751989
Reluplex: An efficient SMT solver for verifying deep neural networks
G Katz, C Barrett, DL Dill, K Julian, MJ Kochenderfer
International Conference on Computer Aided Verification, 97-117, 2017
7412017
Automatic verification of pipelined microprocessor control
JR Burch, DL Dill
International Conference on Computer Aided Verification, 68-80, 1994
7391994
Better verification through symmetry
CN Ip, DL Dill
Formal methods in system design 9 (1-2), 41-75, 1996
7351996
A decision procedure for bit-vectors and arrays
V Ganesh, DL Dill
International Conference on Computer Aided Verification, 519-531, 2007
7122007
Sequential circuit verification using symbolic model checking
JR Burch, EM Clarke, KL McMillan, DL Dill
27th ACM/IEEE Design Automation Conference, 46-51, 1990
6681990
Protocol Verification as a Hardware Design Aid.
DL Dill, AJ Drexler, AJ Hu, CH Yang
ICCD 92, 522-525, 1992
6101992
CMC: A pragmatic approach to model checking real code
M Musuvathi, DYW Park, A Chou, DR Engler, DL Dill
ACM SIGOPS Operating Systems Review 36 (SI), 75-88, 2002
5092002
The Mur ϕ verification system
DL Dill
International Conference on Computer Aided Verification, 390-393, 1996
4611996
Parallelizing the Murϕ verifier
U Stern, DL Dill
International Conference on Computer Aided Verification, 256-267, 1997
358*1997
Experience with predicate abstraction
S Das, DL Dill, S Park
International Conference on Computer Aided Verification, 160-171, 1999
3401999
Automatic verification of sequential circuits using temporal logic
MC Browne, EM Clarke, DL Dill, B Mishra
IEEE Transactions on Computers, 1035-1044, 1986
3001986
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