| Multilevel thresholding using grey wolf optimizer for image segmentation AKM Khairuzzaman, S Chaudhury Expert Systems with Applications 86, 64-76, 2017 | 297 | 2017 |
| Impact of oxide thickness on gate capacitance—a comprehensive analysis on MOSFET, nanowire FET, and CNTFET devices SK Sinha, S Chaudhury IEEE transactions on nanotechnology 12 (6), 958-964, 2013 | 88 | 2013 |
| Approach to suppress ambipolar conduction in Tunnel FET using dielectric pocket CK Pandey, D Dash, S Chaudhury Micro & Nano Letters 14 (1), 86-90, 2019 | 55 | 2019 |
| Review of circuit level leakage minimization techniques in CMOS VLSI circuits R Lorenzo, S Chaudhury IETE Technical review 34 (2), 165-187, 2017 | 55 | 2017 |
| Efficient technique for rice grain classification using back‐propagation neural network and wavelet decomposition KR Singh, S Chaudhury IET Computer Vision 10 (8), 780-787, 2016 | 55 | 2016 |
| Comparative study of leakage power in CNTFET over MOSFET device SK Sinha, S Chaudhury Journal of Semiconductors 35 (11), 114002, 2014 | 48 | 2014 |
| LCNT-an approach to minimize leakage power in CMOS integrated circuits R Lorenzo, S Chaudhury Microsystem Technologies 23, 4245-4253, 2017 | 42 | 2017 |
| Effect of asymmetric gate–drain overlap on ambipolar behavior of double-gate TFET and its impact on HF performances CK Pandey, A Singh, S Chaudhury Applied Physics A 126 (3), 225, 2020 | 41 | 2020 |
| Masi entropy based multilevel thresholding for image segmentation AKM Khairuzzaman, S Chaudhury Multimedia Tools and Applications 78 (23), 33573-33591, 2019 | 41 | 2019 |
| Analysis of different parameters of channel material and temperature on threshold voltage of CNTFET SK Sinha, S Chaudhury Materials Science in Semiconductor Processing 31, 431-438, 2015 | 39 | 2015 |
| Advantage of CNTFET characteristics over MOSFET to reduce leakage power SK Sinha, S Chaudhury 2014 2nd international conference on devices, circuits and systems (ICDCS), 1-5, 2014 | 38 | 2014 |
| Design and analysis of high k silicon nanotube tunnel FET device A Singh, S Chaudhury, C Kumar Pandey, S Madhulika Sharma, ... IET Circuits, Devices & Systems 13 (8), 1305-1310, 2019 | 34 | 2019 |
| Improvement in analog/RF performances of SOI TFET using dielectric pocket CK Pandey, D Dash, S Chaudhury International Journal of Electronics 107 (11), 1844-1860, 2020 | 33 | 2020 |
| Impact of dielectric pocket on analog and high-frequency performances of cylindrical gate-all-around tunnel FETs CK Pandey, D Dash, S Chaudhury ECS Journal of Solid State Science and Technology 7 (5), N59, 2018 | 31 | 2018 |
| Genetic algorithm-based FSM synthesis with area-power trade-offs S Chaudhury, KT Sistla, S Chattopadhyay Integration 42 (3), 376-384, 2009 | 31 | 2009 |
| Effect of strain in silicon nanotube FET devices for low power applications A Singh, CK Pandey, S Chaudhury, CK Sarkar The European Physical Journal Applied Physics 85 (1), 10101, 2019 | 27 | 2019 |
| A novel 9T SRAM architecture for low leakage and high performance R Lorenzo, S Chaudhury Analog Integrated Circuits and Signal Processing 92, 315-325, 2017 | 26 | 2017 |
| CNTFET: The emerging post-CMOS device SK Sinha, K Kumar, S Chaudhury 2013 international conference on signal processing and Communication (ICSC …, 2013 | 25 | 2013 |
| Moth-flame optimization algorithm based multilevel thresholding for image segmentation AKM Khairuzzaman, S Chaudhury International Journal of Applied Metaheuristic Computing (IJAMC) 8 (4), 58-83, 2017 | 24 | 2017 |
| Dynamic threshold sleep transistor technique for high speed and low leakage in CMOS circuits R Lorenzo, S Chaudhury Circuits, Systems, and Signal Processing 36, 2654-2671, 2017 | 24 | 2017 |
Dr. Sanjeet K SinhaProfessor, Lovely Professional University, Punjab, IndiaVerified email at lpu.co.in
