Dr. Vikas Mahor
Dr. Vikas Mahor
Assistant Professor
Verified email at mitsgwalior.in
Title
Cited by
Cited by
Year
An efficient fine grained access control scheme based on attributes for enterprise class applications
S Chatterjee, AK Gupta, VK Mahor, T Sarmah
2014 International Conference on Signal Propagation and Computer Technology …, 2014
102014
A state-of-the-art current mirror-based reliable wide fan-in FinFET domino OR gate design
V Mahor, M Pattanaik
Circuits, Systems, and Signal Processing 37 (2), 475-499, 2018
92018
Low leakage and highly noise immune FinFET-based wide fan-in dynamic logic design
V Mahor, M Pattanaik
Journal of Circuits, Systems and Computers 24 (05), 1550073, 2015
92015
Highly robust Finfet based wide Fan-in dynamic OR gate with dynamic threshold voltage control
V Mahor, M Pattanaik
2014 International Conference on Circuits, Systems, Communication and …, 2014
62014
Novel Ultra Low Leakage FinFET Based SRAM Cell
V Kumar, V Mahor, M Pattanaik
2016 IEEE International Symposium on Nanoelectronic and Information Systems …, 2016
42016
Taguchi's loss function based measurement of mobile ad-hoc network parameters under AODV routing protocol
V Mahor, S Raghuwanshi
2013 Fourth International Conference on Computing, Communications and …, 2013
42013
A highly accurate fire detection method using discriminate method
S Kundu, V Mahor, R Gupta
2018 International Conference on Advances in Computing, Communications and …, 2018
32018
Low stand-by power and process variation tolerant finfet based sram cell
A Bhadoria, M Chaturvedi, V Mahor, M Pattanaik
2016 IEEE International Symposium on Nanoelectronic and Information Systems …, 2016
32016
A novel process variation tolerant wide fan-in dynamic OR gate with reduced contention
V Mahor, A Chouhan, M Pattanaik
2012 5th International Conference on Computers and Devices for Communication …, 2012
32012
A novel low power noise tolerant high performance dynamic feed through logic design technique
M Pattanaik, S Parashar, CI Kumar, A Chouhan, V Mahor
2011 International Symposium on Electronic System Design, 118-123, 2011
32011
A novel low power noise tolerant high performance dynamic feed through logic design technique
M Pattanaik, S Parashar, CI Kumar, A Chouhan, V Mahor
2011 International Symposium on Electronic System Design, 118-123, 2011
32011
An Aging-Aware Reliable FinFET-Based Low-Power 32-Word × 32-bit Register File
V Mahor, M Pattanaik
Circuits, Systems, and Signal Processing 36 (12), 4789-4808, 2017
22017
Robust FinFET based highly noise immune power gated SRAM circuit design
N Bhardwaj, V Mahor, M Pattanaik
2015 International Conference on Communication Networks (ICCN), 310-316, 2015
22015
Novel NBTI aware approach for low power FinFET based wide fan-in domino logic
V Mahor, M Pattanaik
Journal of Low Power Electronics 11 (2), 225-235, 2015
22015
A novel delay minimization technique for low leakagewide fan-in domino logic gates
A Chouhan, V Mahor, M Pattanaik
2012 5th International Conference on Computers and Devices for Communication …, 2012
22012
FinFET-Based Low Power Address Decoder under Process Variation
M Chaturvedi, A Bhadoria, V Mahor, M Pattanaik
2016 IEEE International Symposium on Nanoelectronic and Information Systems …, 2016
12016
A Novel Meta-material Based Mirco-strip Patch Antenna
V Mahor, M Singh
International Conference on Sustainable and Innovative Solutions for Current …, 2019
2019
Image Filtering with Iterative Wavelet Transform Based Compression
V Mahor, S Agrawal, R Gupta
International Conference on Advances in Computing and Data Sciences, 250-262, 2019
2019
Survey Paper on Image Defogging Using Various Techniques
B Bandil, VV Tharke, V Mahor
Recent Trends in Parallel Computing 5 (1), 20-26, 2018
2018
A NBTI tolerant technique for FinFET based wide fan-in dynamic logic
V Mahor, M Pattanaik
2017 Conference on Information and Communication Technology (CICT), 1-6, 2017
2017
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