Rijoy Mukherjee
Rijoy Mukherjee
Research scholar at CSE dept, IIT Kharagpur
Verified email at iitkgp.ac.in
Title
Cited by
Cited by
Year
On the reliability of majority logic structure in quantum-dot cellular automata
B Sen, Y Sahu, R Mukherjee, RK Nath, BK Sikdar
Microelectronics Journal 47, 7-18, 2016
442016
Towards the design of hybrid QCA tiles targeting high fault tolerance
B Sen, M Dutta, R Mukherjee, RK Nath, AP Sinha, BK Sikdar
Journal of Computational Electronics 15 (2), 429-445, 2016
382016
Design of testable adder in quantum‐dot cellular automata with fault secure logic
M Goswami, B Sen, R Mukherjee, BK Sikdar
Microelectronics Journal 60, 1-12, 2017
262017
Efficient design of fault tolerant tiles in QCA
B Sen, A Agarwal, RK Nath, R Mukherjee, BK Sikdar
2014 Annual IEEE India Conference (INDICON), 1-6, 2014
142014
Reliability-aware design for programmable QCA logic with scalable clocking circuit
B Sen, MR Chowdhury, R Mukherjee, M Goswami, BK Sikdar
Journal of Computational Electronics 16 (2), 473-485, 2017
132017
Design of reliable universal QCA logic in the presence of cell deposition defect
B Sen, R Mukherjee, K Mohit, BK Sikdar
International Journal of Electronics 104 (8), 1285-1297, 2017
82017
Design of fault tolerant universal logic in QCA
B Sen, R Mukherjee, RK Nath, BK Sikdar
2014 Fifth International Symposium on Electronic System Design, 166-170, 2014
82014
A processing in memory realization using quantum dot cellular automata (QCA): Proposal and implementation
PP Chougule, B Sen, R Mukherjee, PS Patil, RK Kamat, TD Dongale
Sumy State University, 2017
52017
Characterization and analysis of single electron fault of QCA primitives
R Mukherjee, S Tripathi, S Sen, B Sen
2016 International Conference on Microelectronics, Computing and …, 2016
32016
Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect
B Sen, RK Nath, R Mukherjee, Y Sahu, BK Sikdar
2016 29th International Conference on VLSI Design and 2016 15th …, 2016
22016
A Processing In-Memory Realization Using QCA: Proposal and Implementation
PP Chougule, B Sen, R Mukherjee, VC Karade, PS Patil, TD Dongale, ...
arXiv preprint arXiv:1602.02249, 2016
12016
APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network
P Santikellur, R Mukherjee, RS Chakraborty
Proceedings of the 2021 on Great Lakes Symposium on VLSI, 89-94, 2021
2021
Probabilistic Hardware Trojan Attacks on Multiple Layers of Reconfigurable Network Infrastructure
R Mukherjee, V Govindan, S Koteshwara, A Das, KK Parhi, ...
Journal of Hardware and Systems Security 4 (4), 343-360, 2020
2020
SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection
SR Rajendran, R Mukherjee, RS Chakraborty
Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware …, 2020
2020
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Articles 1–14