Joel Hestness
Joel Hestness
Research Scientist, Cerebras Systems
Verified email at cs.wisc.edu - Homepage
Title
Cited by
Cited by
Year
The gem5 simulator
N Binkert, B Beckmann, G Black, SK Reinhardt, A Saidi, A Basu, ...
ACM SIGARCH computer architecture news 39 (2), 1-7, 2011
38812011
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
B Grot, J Hestness, SW Keckler, O Mutlu
2011 38th Annual International Symposium on Computer Architecture (ISCA …, 2011
2422011
Express cube topologies for on-chip interconnects
B Grot, J Hestness, SW Keckler, O Mutlu
2009 IEEE 15th International Symposium on High Performance Computer …, 2009
2182009
gem5-gpu: A heterogeneous cpu-gpu simulator
J Power, J Hestness, MS Orr, MD Hill, DA Wood
IEEE Computer Architecture Letters 14 (1), 34-36, 2014
1972014
Netrace: dependency-driven trace-based network-on-chip simulation
J Hestness, B Grot, SW Keckler
Proceedings of the Third International Workshop on Network on Chip …, 2010
1262010
Deep learning scaling is predictable, empirically
J Hestness, S Narang, N Ardalani, G Diamos, H Jun, H Kianinejad, ...
arXiv preprint arXiv:1712.00409, 2017
1062017
Running PARSEC 2.1 on M5
M Gebhart, J Hestness, E Fatehi, P Gratz, SW Keckler
The University of Texas at Austin, Department of Computer Science, Tech. Rep, 2009
802009
Convolutional Recurrent Neural Networks for Small-Footprint Keyword Spotting
SO Arik, M Kliegl, R Child, J Hestness, A Gibiansky, C Fougner, ...
Interspeech 2017, 2017
622017
Netrace: Dependency-tracking traces for efficient network-on-chip experimentation
J Hestness, SW Keckler
The University of Texas at Austin, Dept. of Computer Science, Tech. Rep, 2011
462011
A comparative analysis of microarchitecture effects on cpu and gpu memory system behavior
J Hestness, SW Keckler, DA Wood
2014 IEEE International Symposium on Workload Characterization (IISWC), 150-160, 2014
442014
GPU computing pipeline inefficiencies and optimization opportunities in heterogeneous CPU-GPU processors
J Hestness, SW Keckler, DA Wood
2015 IEEE International Symposium on Workload Characterization, 87-97, 2015
352015
Fftw and complex ambiguity function performance on the maestro processor
K Singh, JP Walters, J Hestness, J Suh, CM Rogers, SP Crago
2011 Aerospace Conference, 1-8, 2011
152011
Beyond human-level accuracy: Computational challenges in deep learning
J Hestness, N Ardalani, G Diamos
Proceedings of the 24th Symposium on Principles and Practice of Parallel …, 2019
142019
A QoS-enabled on-die interconnect fabric for kilo-node chips
B Grot, J Hestness, S Keckler, O Mutlu
Ieee Micro 32 (3), 17-25, 2012
142012
Compositional generalization for primitive substitutions
Y Li, L Zhao, J Wang, J Hestness
arXiv preprint arXiv:1910.02612, 2019
82019
Deep Learning Scaling is Predictable
J Hestness, S Narang, N Ardalani, G Diamos, H Jun, H Kianinejad, ...
Empirically, ArXiv e-prints, 2017
62017
Have a larger cake and eat it faster too: A guideline to train larger models faster
N Ardalani, J Hestness, G Diamos
SysML, 2018
12018
3 DAY STARTUP: MOLDING STUDENT ENTREPRENEURS FOR FUN AND NON-PROFIT
J Hestness, T Finsterbusch, C Houser, E Mercer, J Guillory
INTED2011 Proceedings, 6040-6050, 3
13
Time and the Value of Data
E Valavi, J Hestness, N Ardalani, M Iansiti
Harvard Business School Strategy Unit Working Paper, 2020
2020
Embeddings with classes
K Church, HW Jun, J Hestness
US Patent App. 16/702,299, 2020
2020
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