Vyacheslav Yarmolik
Vyacheslav Yarmolik
Professor of Computer Science, WI PB, BSUIR
Verified email at bsuir.by
Title
Cited by
Cited by
Year
March LR: A test for realistic linked faults
AJ van de Goor, GN Gaydadjiev, VG Mikitjuk, VN Yarmolik
Proceedings of 14th VLSI Test Symposium, 272-280, 1996
1541996
Generation and application of pseudorandom sequences for random testing
VN Yarmolik, SN Demidenko
John Wiley & Sons, Inc., 1988
851988
Transparent memory testing for pattern sensitive faults
MG Karpovsky, VN Yarmolik
Proceedings., International Test Conference, 860-869, 1994
481994
Генерирование и применение псевдослучайных сигналов в системах испытания и контроля
СД В Ярмолик
Мн Наука и техника, 1986
471986
Symmetric transparent BIST for RAMs
VN Yarmolik, S Hellebrand
Design, Automation and Test in Europe Conference and Exhibition, 1999 …, 1999
451999
RAM testing algorithms for detection multiple linked faults
VG Mikitjuk, VN Yarmolik, AJ Van De Goor
Proceedings ED&TC European Design and Test Conference, 435-439, 1996
451996
Efficient online and offline testing of embedded DRAMs
S Hellebrand, HJ Wunderlich, AA Ivaniuk, YV Klimets, VN Yarmolik
IEEE Transactions on Computers 51 (7), 801-809, 2002
432002
Transparent memory BIST
MG Karpovsky, VN Yarmolik
Proceedings of IEEE International Workshop on Memory Technology, Design, and …, 1994
421994
March LA: a test for linked memory faults.
AJ van de Goor, G Gaydadjiev, VN Yarmolik, VG Mikitjuk
ED&TC, 627, 1997
411997
Obfuscation as intellectual rights protection in VHDL language
M Brzozowski, VN Yarmolik
6th International Conference on Computer Information Systems and Industrial …, 2007
402007
Self-adjusting output data compression: An efficient BIST technique for RAMs
VN Yarmolik, S Hellebrand, HJ Wunderlich
Proceedings Design, Automation and Test in Europe, 173-179, 1998
391998
RAM diagnostic tests
V Yarmolik
371996
March PS (23N) test for DRAM pattern-sensitive faults
V Yarmolik, Y Klimets, S Demidenko
Proceedings Seventh Asian Test Symposium (ATS'98)(Cat. No. 98TB100259), 354-357, 1998
351998
Pseudo-exhaustive word-oriented DRAM testing
MG Karpovsky, AJ van de Goor, VN Yarmolik
Proceedings the European Design and Test Conference. ED&TC 1995, 126-132, 1995
311995
Fault diagnosis of digital circuits
VN Iarmolik
Chichester, 1990
281990
Fault Diagnostics of Digital Circuits
V Yarmolik
281990
Error detecting refreshment for embedded DRAMs
S Hellebrand, HJ Wunderlich, A Ivaniuk, Y Klimets, VN Yarmolik
Proceedings 17th IEEE VLSI Test Symposium (Cat. No. PR00146), 384-390, 1999
261999
Self-testing VLSI design
VN Yarmolik, IV Kachan
Elsevier (Amsterdam and New York), 1993
251993
Iterative antirandom testing
I Mrozek, VN Yarmolik
Journal of Electronic Testing 28 (3), 301-315, 2012
242012
Symmetric transparent bist for rams
S Hellebrand, HJ Wunderlich, VN Yarmolik
Proceedings of the conference on Design, automation and test in Europe, 135-es, 1999
22*1999
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