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Sumit Saha
Sumit Saha
PhD Scholar, IIT Bombay; Visiting scholar in Ohio State University
Verified email at ee.iitb.ac.in
Title
Cited by
Cited by
Year
Sub-50-mV nanoelectromechanical switch without body bias
S Saha, MS Baghini, M Goel, VR Rao
IEEE Transactions on electron devices 67 (9), 3894-3897, 2019
172019
A nano-electro-mechanical switch based power gating for effective stand-by power reduction in FinFET technologies
S Saha, US Kumar, MS Baghini, M Goel, VR Rao
IEEE Electron Device Letters 38 (5), 681-684, 2017
112017
Signal processing techniques for the analysis of human genome associated with cancer cells
S Barman, S Saha, A Mondal, M Roy
2nd annual IEEE Information Technology, Electronics and Mobile Communication …, 2011
82011
Stand-by power reduction using experimentally demonstrated nano-electromechanical switch in CMOS technologies
S Saha, A Singh, MS Baghini, M Goel, VR Rao
IEEE Transactions on Electron Devices 68 (2), 746-752, 2020
72020
Energy efficient lif neuron circuit using hybrid cmos-nems in 65 nm cmos technology
S Saha, PB Kanakya, M Goel, MS Baghini, VR Rao
2022 IEEE 35th International Conference on Micro Electro Mechanical Systems …, 2022
62022
Impact of Thermal Effects on the Performance of the Power Gating Circuits using NEMS, FinFETs and NWFETs
S Saha, US Kumar, MS Baghini, M Goel, VR Rao
IEEE Transaction on Electron Devices, 2021
32021
Heterogeneous CMOS-MEMS based Boost Converter for 2.4 GHz RF energy Harvester
S Saha, PB Kanyaka, M Lust, N Ghalichechian, VR Rao, MS Baghini
2024 37th International Conference on VLSI Design and 2024 23rd …, 2024
22024
A novel architecture for QPSK modulation based on time-mode signal processing
S Saha, B Kar, S Sur-Kolay
18th International Symposium on VLSI Design and Test, 1-6, 2014
22014
Efficient 1-V Boost Converter Using Sub-50-mV NEMS Without Body Bias
S Saha, G Saini, MS Baghini, M Goel, VR Rao
IEEE Transaction on Electron Devices, 2021
12021
Optimal Approach to Scaling of the NEMS for Low Stand-by CMOS Applications
S Saha, S Joshi, T Naik, M Goel, VR Rao, MS Baghini
2020 IEEE Silicon Nanoelectronics Workshop (SNW), 121-122, 2020
12020
Modelling and Characterization of Amino Acids Using MOS Technology
S Saha, S Barman
International Journal of Computer Applications in Engineering Sciences, 2014
12014
A Comparative Power & Delay Analysis of Full Adder Designs in 90nm CMOS and 32nm & 5nm CNFET Technologies
A Sen, NK Sah, K Bhunia, S Saha
2024 IEEE International Conference of Electron Devices Society Kolkata …, 2024
2024
Energy Efficient Leaky Integrate and Fire Neuron Circuit using Hybrid CMOS-NEMS in 65 nm CMOS Technology
S Saha, P Kanyaka, M Goel, VR Rao, MS Baghini
35th IEEE International Conference on Micro Electro Mechanical Systems (IEEE …, 2022
2022
Fabrication of CMOS Compatible 2-terminal NEMS for Low Power Applications
S Saha, MS Baghini, M Goel, VR Rao
5th IEEE International Conference on Emerging Electronics (ICEE), 2020
2020
SPECTRAL ANALYSIS OF AMINO ACID SEQUENCE
S Saha, S Barman, M Roy
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